[llvm] [AMDGPU] Pick available high VGPR for CSR SGPR spilling (PR #78669)

[Matt Arsenault via llvm-commits]

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@@ -95,7 +95,8 @@ static void getVGPRSpillLaneOrTempRegister(
                                          TargetStackID::SGPRSpill);
 
     if (TRI->spillSGPRToVGPR() &&
-        MFI->allocateSGPRSpillToVGPRLane(MF, FI, /* IsPrologEpilog */ true)) {
+        MFI->allocateSGPRSpillToVGPRLane(MF, FI, /* SpillToPhysVGPRLane */ true,
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arsenm wrote:

`/*SpillToPhysVGPRLane=*/`

https://github.com/llvm/llvm-project/pull/78669