[llvm] [RISCV] Optimise spills/fills of FPR<->GPR moves (PR #78408)

[Craig Topper via llvm-commits]

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@@ -741,8 +732,7 @@ define i32 @fill_float_to_i32(float %a) nounwind {
 ; RV64ID-NEXT:    fsw fa0, 4(sp) # 4-byte Folded Spill
 ; RV64ID-NEXT:    #APP
 ; RV64ID-NEXT:    #NO_APP
-; RV64ID-NEXT:    flw fa5, 4(sp) # 4-byte Folded Reload
-; RV64ID-NEXT:    fmv.x.w a0, fa5
+; RV64ID-NEXT:    ld a0, 4(sp) # 4-byte Folded Reload
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topperc wrote:

This says 4-byte load, but it's `ld` and probably misaligned.

https://github.com/llvm/llvm-project/pull/78408