[llvm] [RISCV] Make X5 allocatable for JALR on CPUs without RAS (PR #78417)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 17 09:08:37 PST 2024


topperc wrote:

Do you have any performance or code size data to show that this change is a benefit to CPUs with RAS?

https://github.com/llvm/llvm-project/pull/78417


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