[llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)
Momchil Velikov via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 17 05:11:16 PST 2024
================
@@ -3037,19 +3055,37 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
std::swap(Reg1, Reg2);
std::swap(FrameIdxReg1, FrameIdxReg2);
}
+
+ unsigned PnReg;
+ unsigned PairRegs;
+ if (RPI.isPaired() && RPI.isScalable()) {
+ PnReg = findFreePredicateAsCounterReg(MF);
----------------
momchil-velikov wrote:
We need just one register, so there's no need to call the function every time, at the time of the creation of the `ptrue` instruction is enough. That'll also defend against the function returning different registers on each iteration (once we get a register and used in `ptrue` it's not free anymore, is it?).
https://github.com/llvm/llvm-project/pull/77665
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