[llvm] [AMDGPU] SILowerSGPRSpills: do not update MRI reserve registers (PR #77888)

[Christudasan Devadasan via llvm-commits]

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@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
-# RUN: llc -mtriple=amdgcn-unknown-amdpal -mcpu=gfx1030 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs --stress-regalloc=2 -o - %s | FileCheck -check-prefix GCN %s
+# RUN: llc -mtriple=amdgcn-unknown-amdpal -mcpu=gfx1030 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs --stress-regalloc=5 -o - %s | FileCheck -check-prefix GCN %s
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cdevadas wrote:

This option should have been better integrated into MRI to fully limit the register usage in various other passes.

https://github.com/llvm/llvm-project/pull/77888