[llvm] [AArch64] MI Scheduler: create more LDP/STP pairs (PR #77565)

[David Green via llvm-commits]

davemgreen wrote:

Yeah I think there will always be a limit to what the load-store optimizer can figure out, and this is just adding a few more LDRQ<->LDURQ and LDURQ<->LDRQ pairings to what we already do.

Is it worth extending that to LDRS and LDRD to fill in the gaps?

https://github.com/llvm/llvm-project/pull/77565