[llvm] [RISCV] Move vector load/store segment instructions upwards into 'Vector Loads and Stores'. NFC (PR #77297)
Wang Pengcheng via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 8 03:43:15 PST 2024
wangpc-pp wrote:
I think this is because we used to have `Zvlseg` sub-extension?
https://github.com/llvm/llvm-project/pull/77297
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