[llvm] [JITLink][AArch32] Add TableGen Backend for Instr Encodings (PR #76996)

[Eymen Ünay via llvm-commits]

================
@@ -212,20 +212,6 @@ template <> struct FixupInfo<Arm_Call> : public FixupInfoArmBranch {
   static constexpr uint32_t BitBlx = 0x10000000;
 };
 
-struct FixupInfoArmMov : public FixupInfoArm {
-  static constexpr uint32_t OpcodeMask = 0x0ff00000;
-  static constexpr uint32_t ImmMask = 0x000f0fff;
-  static constexpr uint32_t RegMask = 0x0000f000;
-};
-
-template <> struct FixupInfo<Arm_MovtAbs> : public FixupInfoArmMov {
-  static constexpr uint32_t Opcode = 0x03400000;
----------------
eymay wrote:

Thanks a lot! This will streamline the backend implementation and will provide immense flexibility while using.

https://github.com/llvm/llvm-project/pull/76996