[llvm] [RISCV] Add support predicating for ANDN/ORN/XNOR with short-forward-branch-opt. (PR #77077)

[Craig Topper via llvm-commits]

================
@@ -1348,6 +1348,14 @@ unsigned getPredicatedOpcode(unsigned Opcode) {
   case RISCV::SRAIW: return RISCV::PseudoCCSRAIW; break;
   }
 
+  if (STI.hasStdExtZbbOrZbkb()) {
----------------
topperc wrote:

This check isn't needed. If the ANDN/ORN/XNOR instruction is present then Zbb/Zbkb must be enabled.

https://github.com/llvm/llvm-project/pull/77077