[llvm] [CodeGen][MachinePipeliner] Limit register pressure when scheduling (PR #74807)
Leandro Lupori via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 3 10:43:44 PST 2024
================
@@ -2044,6 +2457,16 @@ bool SwingSchedulerDAG::schedulePipeline(SMSchedule &Schedule) {
// If a schedule is found, check if it is a valid schedule too.
if (scheduleFound)
scheduleFound = Schedule.isValidSchedule(this);
+
+ // If a schedule found and the option is enabled, check if the schedule
+ // might generate additional register spill/fill
----------------
luporl wrote:
```suggestion
// If a schedule was found and the option is enabled, check if the schedule
// might generate additional register spills/fills.
```
https://github.com/llvm/llvm-project/pull/74807
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