[llvm] [CodeGen][MachinePipeliner] Limit register pressure when scheduling (PR #74807)

[Leandro Lupori via llvm-commits]

luporl wrote:

A few suggestions to improve the description text:

> how many variables can actually alive at the same time.

how many variables can actually be alive at the same time.

> This can result a lot of register spills/fills can be generated after register allocation, ...

As a result, a lot of register spills/fills can be generated after register allocation, ...

>     * We are developing another patch to support `MachinePipeliner` for AArch64. When applying the patch, we'd like to enable this patch in AArch64.

* We are developing another patch to support `MachinePipeliner` for AArch64. When applying that patch, we'd like to enable `pipeliner-register-pressure` in AArch64. (if I understood it correctly)
       
>       * This doesn't mean enabling `MachinePipeliner` by default on AArch64.

So, does it mean that, when `MachinePipeliner` is enabled on AArch64 `pipeliner-register-pressure` will be enabled by
default?

What about `pipeliner-ii-search-range` and `pipeliner-register-pressure-margin`?
Will the improved II search method reduce the need to use `pipeliner-ii-search-range`?
And will `pipeliner-register-pressure-margin` remain available for fine tuning?

https://github.com/llvm/llvm-project/pull/74807