[llvm] [RISCV][ISel] Combine scalable vector add/sub/mul with zero/sign extension (PR #72340)
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    Tue Jan  2 22:56:41 PST 2024
    
    
  
sun-jacobi wrote:
@topperc  Should I create another PR? 
https://github.com/llvm/llvm-project/pull/72340
    
    
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