[llvm] AMDGPU: Fix packed 16-bit inline constants (PR #76522)
Joe Nash via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 2 13:14:43 PST 2024
================
@@ -2508,53 +2508,95 @@ bool isInlinableLiteral16(int16_t Literal, bool HasInv2Pi) {
Val == 0x3118; // 1/2pi
}
-bool isInlinableLiteralV216(int32_t Literal, bool HasInv2Pi) {
- assert(HasInv2Pi);
-
- if (isInt<16>(Literal) || isUInt<16>(Literal)) {
- int16_t Trunc = static_cast<int16_t>(Literal);
- return AMDGPU::isInlinableLiteral16(Trunc, HasInv2Pi);
+std::optional<unsigned> getInlineEncodingV216(bool IsFloat, uint32_t Literal) {
+ // Unfortunately, the Instruction Set Architecture Reference Guide is
+ // misleading about how the inline operands work for (packed) 16-bit
+ // instructions. In a nutshell, the actual HW behavior is:
+ //
+ // - integer encodings (-16 .. 64) are always produced as sign-extended
+ // 32-bit values
+ // - float encodings are produces as:
----------------
Sisyph wrote:
```suggestion
// - float encodings are produced as:
```
https://github.com/llvm/llvm-project/pull/76522
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