[llvm] [RISCV] Initial ISel support for the experimental zacas extension (PR #67918)

[Craig Topper via llvm-commits]

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@@ -571,6 +571,16 @@ def GPRPF64 : RegisterClass<"RISCV", [f64], 64, (add
     X0_PD, X2_PD, X4_PD
 )>;
 
+let RegInfos = RegInfoByHwMode<[RV32, RV64], [RegInfo<32, 32, 32>, RegInfo<64, 64, 64>]> in
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topperc wrote:

I don't think these RegInfos are correct. I think they should be `RegInfo<64, 64, 64>, RegInfo<128, 128, 128>`.

https://github.com/llvm/llvm-project/pull/67918