[llvm] X86: implement lowerings for shuffles on `bf16` element type. (PR #76076)

via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 22 11:38:35 PST 2023


bjacob wrote:

> > Do you prefer to take this over or teach me how/where to add tests for this?
> 
> What's the problem you want to solve here? From the code, I think `v16bf16` is well supported. And I tested some `v8bf16/v32bf16` cases and they can generate correct code too. So I think they are also supported, just have difference in the code with FP16. If you know some failure cases, you can add them as test cases.

Thanks for the review. Here is a minimized testcase:

```llvm
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

define i32 @run_initialize_dispatch_12_pack_bf16(<32 x bfloat> %0) #0 {
.preheader27.lr.ph:
  br label %.preheader26

.preheader26:                                     ; preds = %.preheader26, %.preheader27.lr.ph
  %1 = shufflevector <32 x bfloat> %0, <32 x bfloat> zeroinitializer, <32 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
  %2 = shufflevector <32 x bfloat> %1, <32 x bfloat> zeroinitializer, <2 x i32> <i32 0, i32 1>
  store <2 x bfloat> %2, ptr null, align 2
  br label %.preheader26
}

attributes #0 = { "target-cpu"="znver4" }
```

Repro:

```
llvm-project/bin/llc --mattr=+avx512bf16 reduced.ll 
Not a valid 512-bit x86 vector type!
UNREACHABLE executed at /home/benoit/iree/third_party/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp:17125!
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: llvm-project/bin/llc --mattr=+avx512bf16 reduced.ll
1.      Running pass 'Function Pass Manager' on module 'reduced.ll'.
2.      Running pass 'X86 DAG->DAG Instruction Selection' on function '@run_initialize_dispatch_12_pack_bf16'
```

Going to go over all your review comments now (thanks again) and update the PR with that as a test.


https://github.com/llvm/llvm-project/pull/76076


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