[llvm] X86: implement lowerings for shuffles on `bf16` element type. (PR #76076)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 22 11:35:41 PST 2023
================
@@ -927,6 +927,17 @@ void SelectionDAGLegalize::LegalizeLoadOps(SDNode *Node) {
Chain = Result.getValue(1);
break;
}
+ if (SrcVT.getScalarType() == MVT::bf16) {
+ EVT ISrcVT = SrcVT.changeTypeToInteger();
+ EVT IDestVT = DestVT.changeTypeToInteger();
+ EVT ILoadVT = TLI.getRegisterType(IDestVT.getSimpleVT());
+
+ SDValue Result = DAG.getExtLoad(ISD::ZEXTLOAD, dl, ILoadVT, Chain,
+ Ptr, ISrcVT, LD->getMemOperand());
+ Value = DAG.getNode(ISD::BF16_TO_FP, dl, DestVT, Result);
+ Chain = Result.getValue(1);
+ break;
+ }
----------------
bjacob wrote:
oh right, i don't know how i didn't see that. Thanks for the catch.
https://github.com/llvm/llvm-project/pull/76076
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