[llvm] [RISCV][NFC] Refine MCOperandPredicate code for rtlist. (PR #76028)
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    Wed Dec 20 01:12:30 PST 2023
    
    
  
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Yeting Kuo (yetingk)
<details>
<summary>Changes</summary>
(Imm <= 15) could be implied by isUInt<4>(Imm).
---
Full diff: https://github.com/llvm/llvm-project/pull/76028.diff
1 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVInstrInfoZc.td (+1-2) 
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
index a78f3624446871..9a7249fe3e3d6c 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
@@ -56,9 +56,8 @@ def rlist : Operand<OtherVT> {
     int64_t Imm;
     if (!MCOp.evaluateAsConstantImm(Imm))
       return false;
-    if (!isUInt<4>(Imm)) return false;
     // 0~3 Reserved for EABI
-    return (Imm >= 4) && (Imm <= 15);
+    return isUInt<4>(Imm) && Imm >= 4;
   }];
  }
 
``````````
</details>
https://github.com/llvm/llvm-project/pull/76028
    
    
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