[llvm] [RISCV][MISched] Set EnableIntervals to true for SiFive7 (PR #75681)

Michael Maitland via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 19 18:25:05 PST 2023

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michaelmaitland wrote:

> Does it fail in -Asserts?

I haven’t seen any failures. Are you asking for any specific reason?

https://github.com/llvm/llvm-project/pull/75681

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