[llvm] [RISCV][MISched] Set EnableIntervals to true for SiFive7 (PR #75681)

[Michael Maitland via llvm-commits]

================
@@ -0,0 +1,56 @@
+# RUN: llc -mtriple=riscv64 -mcpu=sifive-x280 -run-pass=machine-scheduler      \
+# RUN:  -debug-only=machine-scheduler -misched-dump-schedule-trace             \
+# RUN:  -misched-topdown -o - %s 2>&1 | FileCheck %s
+
+# The purpose of this test is to show that the VADD instructions are issued at
----------------
michaelmaitland wrote:

I will drop the word `at` so it makes sense.

https://github.com/llvm/llvm-project/pull/75681