[llvm] [RISCV][GISel] RegBank select and instruction select for vector G_ADD, G_SUB (PR #74114)

[Craig Topper via llvm-commits]

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@@ -25,17 +25,20 @@ namespace llvm {
 namespace RISCV {
 
 const RegisterBankInfo::PartialMapping PartMappings[] = {
-    {0, 32, GPRBRegBank},
-    {0, 64, GPRBRegBank},
-    {0, 32, FPRBRegBank},
-    {0, 64, FPRBRegBank},
+    {0, 32, GPRBRegBank}, {0, 64, GPRBRegBank}, {0, 32, FPRBRegBank},
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topperc wrote:

Please put these back on single lines regardless of what clang-format says

https://github.com/llvm/llvm-project/pull/74114