[llvm] [RISCV][GISel] RegBank select and instruction select for vector G_ADD, G_SUB (PR #74114)

[Craig Topper via llvm-commits]

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@@ -785,6 +785,21 @@ const TargetRegisterClass *RISCVInstructionSelector::getRegClassForTypeOnBank(
   }
 
   // TODO: Non-GPR register classes.
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topperc wrote:

I think we can delete this TODO

https://github.com/llvm/llvm-project/pull/74114