[llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 15 09:27:03 PST 2023

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https://github.com/preames closed https://github.com/llvm/llvm-project/pull/75531

Previous message: [llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)
Next message: [clang] [clang-tools-extra] [flang] [mlir] [lldb] [compiler-rt] [llvm] [Profile] Add binary profile correlation for code coverage. (PR #69493)
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