[llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Dec 15 09:16:10 PST 2023

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https://github.com/topperc approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/75531

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