[llvm] [RISCV] Rematerialize load (PR #73924)
Niwin Anto via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 12 22:13:28 PST 2023
================
@@ -1567,6 +1573,37 @@ bool RISCVInstrInfo::isAsCheapAsAMove(const MachineInstr &MI) const {
return MI.isAsCheapAsAMove();
}
+bool RISCVInstrInfo::isReallyTriviallyReMaterializable(
+ const MachineInstr &MI) const {
+
+ if (TargetInstrInfo::isReallyTriviallyReMaterializable(MI))
+ return true;
+
+ if (MI.mayLoad() && AggressiveLoadRemat) {
+ const MachineFunction &MF = *MI.getMF();
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+
+ const MachineOperand &Dest = MI.getOperand(0);
+ if (!MRI.hasOneUse(Dest.getReg()))
+ return false;
+
+ MachineInstr *UseMI = &*MRI.use_instr_begin(Dest.getReg());
+ MachineBasicBlock::const_iterator DefItr(MI);
+ MachineBasicBlock::const_iterator UseItr(UseMI);
+ const MachineBasicBlock *MBB = nullptr;
----------------
niwinanto wrote:
I will update.
https://github.com/llvm/llvm-project/pull/73924
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