[llvm] [RISCV][GISel] Instruction select for vector G_ADD, G_SUB (PR #74114)

[Michael Maitland via llvm-commits]

michaelmaitland wrote:

> I think it's the former case and the transformation from pseudos to actual assembly instructions is taken care of by the rest of llvm infrastructure and we don't need to explicitly support in GISel?

This. 

Instruction selection is responsible for lowering into target specific MIR (`MachineInstr`s). The RISCVInsertVSETVLI pass comes later in the pipeline. There is a RISCVAsmPrinter pass that will convert `MachineInstr` to `MCInst` (`RISCVAsmPrinter::lowerToMCInst`) which is the representation of assembly. 

https://github.com/llvm/llvm-project/pull/74114