[llvm] [RISCV][GISel] Instruction select for vector G_ADD, G_SUB (PR #74114)

Jiahan Xie via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 11 07:18:46 PST 2023


jiahanxie353 wrote:

What is the `instruction-select` supposed to generate? Is it  supposed to stop and generate vector instructions pseudos, like what I have right now in the test files; or do we want actual RISC-V `vsetvli` and `vadd` instructions after the `instruction-select` pass? 
I think it's the former case and the transformation from pseudos to actual assembly instructions is taken care of by the rest of llvm infrastructure and we don't need to explicitly support in GISel?

https://github.com/llvm/llvm-project/pull/74114


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