[llvm] [AArch64] merge index address with large offset into base address (PR #72187)

[via llvm-commits]

vfdff wrote:

Thanks for your help, I can reproduce the regression now, and a simplified case [s211](https://gcc.godbolt.org/z/z4rYaj8qn) shows that.
a) without this changes, the const `MOVi32imm constImm` is a loop Invariant, so it is hoisted out the loop.
b) With this changes, the `%12:grp64sp = ADDxri %2:gpr64sp 93, 12` is not a loop Invariant, which checked by the  **MachineLoop::isLoopInvariant**, then it is keep in the loop kernel.
   ```
     // If the loop contains the definition of an operand, then the instruction isn't loop invariant.
    if (contains(MRI->getVRegDef(Reg)))
      return false;
  ```

https://github.com/llvm/llvm-project/pull/72187