[llvm] [AArch64] merge index address with large offset into base address (PR #72187)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 7 12:00:50 PST 2023
davemgreen wrote:
It looks like it was running with `-O3 -flto -mcpu=neoverse-v1`, although I can reproduce without the -mcpu.
`bin/clang -target aarch64 -O3 llvm-test-suite/MultiSource/Benchmarks/TSVC/StatementReordering-flt/tsc.c`
I think it is in these loops that look like:
```
.LBB6_3: | 10079 .LBB6_3:
ldr s1, [x9, x23] | 10082 add x10, x9, #93, lsl #12
ldr s2, [x9, x24] | 10083 add x11, x9, #62, lsl #12
subs x8, x8, #1 | 10084 subs x8, x8, #1
---------------------------------------| 10085 ldr s1, [x11, #2100]
---------------------------------------| 10086 ldr s2, [x10, #3156]
fmadd s0, s1, s2, s0 | 10087 fmadd s0, s1, s2, s0
str s0, [x9, #4]! | 10088 str s0, [x9, #4]!
add x10, x9, x22 | 10089 add x10, x9, #125, lsl #12
ldr s0, [x10, #4] | 10090 add x11, x9, x22
ldr s1, [x9, x25] | 10091 ldr s1, [x10, #128]
---------------------------------------| 10092 add x10, x9, #31, lsl #12
---------------------------------------| 10093 ldr s0, [x11, #4]
fmsub s0, s1, s2, s0 | 10094 fmsub s0, s1, s2, s0
str s0, [x10] | 10095 str s0, [x10, #1040]
b.ne .LBB6_3 | 10096 b.ne .LBB6_3
```
https://github.com/llvm/llvm-project/pull/72187
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