[llvm] [AMDGPU] Prefer lower total register usage in regions with spilling (PR #71882)

[Valery Pykhtin via llvm-commits]

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@@ -88,9 +108,68 @@ void GCNRegPressure::inc(unsigned Reg,
   }
 }
 
-bool GCNRegPressure::less(const GCNSubtarget &ST,
-                          const GCNRegPressure& O,
+bool GCNRegPressure::less(const MachineFunction &MF, const GCNRegPressure &O,
                           unsigned MaxOccupancy) const {
+  const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
+
+  unsigned MaxVGPRs = ST.getMaxNumVGPRs(MF);
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vpykhtin wrote:

I remember at some point you had a guard for your checks if any side at lowest possible occupancy? We're calculating the occupancy later anyway so may be it worth to check it before diving into excess magic, just a performance consideration.

https://github.com/llvm/llvm-project/pull/71882