[llvm] [RISCV] Optimize VRELOAD/VSPILL lowering if VLEN is known. (PR #74421)

[Alex Bradbury via llvm-commits]

asb wrote:

> My primary goal is to remove the read of VLENB which might be expensive if it's not optimized in hardware.

Just curious if there's a known target where that's true? A read of a CSR holding a design-time constant being cheap seems like a reasonable assumption for the compiler to make.

https://github.com/llvm/llvm-project/pull/74421