[llvm] [RISCV][GISel] Instruction select for vector G_ADD, G_SUB (PR #74114)

[Michael Maitland via llvm-commits]

michaelmaitland wrote:

> Hi, I'm stuck on [this part](https://github.com/llvm/llvm-project/blob/21b986637b950bb1762a38201223d62c4bca0dce/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp#L280C25-L280C71), where it tries to compare `Ty.getSizeInBits()`, which is a `vscale x s32` and `TRI.getRegSizeInBits(*RC)`, which is an `int 64`. It seems like there is no `>` overloaded to compare these two types. Is this issue expected?

Before the addition of scalable vectors, the size of scalars and fixed vectors is always known. For example an i32 is 32 bits, a float is 32 bits, and 4 x i32 is 4 * 32 bits. With the addition of scalable vectors, we do not know the size at compile time. The size of a type like `vscale x 1 x i32` depends on the value of `vscale`, which is a runtime constant, which makes the number of bits of that type unknown at compile time.

Instead of returning `unsigned` for the size of the type, we must return `TypeSize`, which is capable of representing that the size is scalable. Take a look at [this](f219e03f3c9bea4220925838c3d57d5a993d4d7a) patch which I added in order to make lowerFormalArguments work. You will likely need to make some unsigned -> TypeSize changes. For the exact case you show here, you probably want to take advantage of the `TypeSize::isKnownLT` function.

https://github.com/llvm/llvm-project/pull/74114