[llvm] [RISCV][GISel] Instruction select for vector G_ADD, G_SUB (PR #74114)

[Jiahan Xie via llvm-commits]

jiahanxie353 wrote:

Hi,
I'm stuck on [this part](https://github.com/llvm/llvm-project/blob/21b986637b950bb1762a38201223d62c4bca0dce/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp#L280C25-L280C71), where it tries to compare `Ty.getSizeInBits()`, which is a `vscale x s32` and `TRI.getRegSizeInBits(*RC)`, which is an `int 64`.
It seems like there is no `>` overloaded to compare these two types.
Is this issue expected?

https://github.com/llvm/llvm-project/pull/74114