[llvm] [RISCV] Initial ISel support for the experimental zacas extension (PR #67918)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 4 19:17:20 PST 2023
================
@@ -728,6 +807,72 @@ bool RISCVExpandAtomicPseudo::expandAtomicCmpXchg(
return true;
}
+static Register getGPRPairEvenReg(Register PairedReg) {
+ switch (PairedReg) {
+ case RISCV::X0_PD:
+ return RISCV::X0;
+ case RISCV::X2_PD:
+ return RISCV::X2;
+ case RISCV::X4_PD:
+ return RISCV::X4;
+ case RISCV::X6_PD:
+ return RISCV::X6;
+ case RISCV::X8_PD:
+ return RISCV::X8;
+ case RISCV::X10_PD:
+ return RISCV::X10;
+ case RISCV::X12_PD:
+ return RISCV::X12;
+ case RISCV::X14_PD:
+ return RISCV::X14;
+ case RISCV::X16_PD:
+ return RISCV::X16;
+ case RISCV::X18_PD:
+ return RISCV::X18;
+ case RISCV::X20_PD:
+ return RISCV::X20;
+ case RISCV::X22_PD:
+ return RISCV::X22;
+ case RISCV::X24_PD:
+ return RISCV::X24;
+ case RISCV::X26_PD:
+ return RISCV::X26;
+ case RISCV::X28_PD:
+ return RISCV::X28;
+ case RISCV::X30_PD:
+ return RISCV::X30;
+ default:
+ llvm_unreachable("Unexpected GPR pair");
+ }
+}
+
+bool RISCVExpandAtomicPseudo::expandAMOCAS(
+ MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, bool IsPaired,
+ int Width, MachineBasicBlock::iterator &NextMBBI) {
+ MachineInstr &MI = *MBBI;
+ DebugLoc DL = MI.getDebugLoc();
+
+ Register DestReg = MI.getOperand(0).getReg();
+ if (IsPaired)
+ DestReg = getGPRPairEvenReg(DestReg);
+ Register AddrReg = MI.getOperand(1).getReg();
+ Register NewValReg = MI.getOperand(3).getReg();
+ if (IsPaired)
+ NewValReg = getGPRPairEvenReg(NewValReg);
+ AtomicOrdering Ordering =
+ static_cast<AtomicOrdering>(MI.getOperand(4).getImm());
+
+ MachineInstr *NewMI =
+ BuildMI(MBB, MBBI, DL, TII->get(getAMOCASForRMW(Ordering, Width, STI)))
+ .addReg(DestReg)
+ .addReg(AddrReg)
+ .addReg(NewValReg);
+ NewMI->getOperand(0).setIsDef(true);
----------------
topperc wrote:
Can we do `.addReg(DestReg, RegState::Define)` on the BuildMI so we don't need to do this?
https://github.com/llvm/llvm-project/pull/67918
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