[llvm] [RISCV] Remove SiFive7PipeV and replace it with SiFive7VCQ (PR #73969)

[Michael Maitland via llvm-commits]

michaelmaitland wrote:

> Have you tried to evaluate it on FPGA/chip and to see the improvements?

We have evaluated on spec2006 and saw improvements. This change is important to take advantage of the parallelism in the vector pipeline. 

https://github.com/llvm/llvm-project/pull/73969