[llvm] [llvm][PowerPC] Correct handling of spill slots for SPE when EXPENSIVE_CHECKS is enabled (PR #73940)

[David Spickett via llvm-commits]

================
@@ -2334,24 +2334,16 @@ bool PPCFrameLowering::assignCalleeSavedSpillSlots(
     // In case of SPE we only have SuperRegs and CRs
     // in our CalleSaveInfo vector.
 
-    unsigned Idx = 0;
     for (auto &CalleeSaveReg : CSI) {
       const MCPhysReg &Reg = CalleeSaveReg.getReg();
       const MCPhysReg &Lower = RegInfo->getSubReg(Reg, 1);
       const MCPhysReg &Higher = RegInfo->getSubReg(Reg, 2);
 
-      // Check only for SuperRegs.
-      if (Lower) {
-        if (MRI.isPhysRegModified(Higher)) {
-          Idx++;
-          continue;
-        } else {
+      if ( // Check only for SuperRegs.
+          Lower &&
           // Replace Reg if only lower-32 bits modified
-          CSI.erase(CSI.begin() + Idx);
-          CSI.insert(CSI.begin() + Idx, CalleeSavedInfo(Lower));
----------------
DavidSpickett wrote:

For this instance of `assignCalleeSavedSpillSlots` yes, but other instances do modify the vector so it cannot be changed for everyone (https://github.com/llvm/llvm-project/blob/de55a2843fae6afd4b0589d81496096a4ff73cbd/llvm/include/llvm/CodeGen/TargetFrameLowering.h#L153).

https://github.com/llvm/llvm-project/pull/73940