[llvm] [AArch64] Teach areMemAccessesTriviallyDisjoint about scalable widths. (PR #73655)
David Sherwood via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 29 08:56:58 PST 2023
================
@@ -2675,9 +2676,15 @@ bool AArch64InstrInfo::getMemOperandsWithOffsetWidth(
return false;
const MachineOperand *BaseOp;
+ TypeSize WidthN(0, false);
if (!getMemOperandWithOffsetWidth(LdSt, BaseOp, Offset, OffsetIsScalable,
- Width, TRI))
+ WidthN, TRI))
return false;
+ // The maximum vscale is 16 undef AArch64, return the maximal extent for the
----------------
david-arm wrote:
Should this comment be
// The maximum vscale is 16 for AArch64
?
https://github.com/llvm/llvm-project/pull/73655
More information about the llvm-commits
mailing list