[llvm] 241076f - [SelectionDAG] Fix assertion for widening of mask operand in MSTORE. (#73295)

[via llvm-commits]

Author: Francesco Petrogalli
Date: 2023-11-29T12:56:30+01:00
New Revision: 241076fb529eafccea9bae8bb407a57d83480745

URL: https://github.com/llvm/llvm-project/commit/241076fb529eafccea9bae8bb407a57d83480745
DIFF: https://github.com/llvm/llvm-project/commit/241076fb529eafccea9bae8bb407a57d83480745.diff

LOG: [SelectionDAG] Fix assertion for widening of mask operand in MSTORE. (#73295)

According to the code in `SelectionDAG::getMaskedStore`, the Mask
operator is in position 4, not 3:

     SDValue Ops[] = {Chain, Val, Base, Offset, Mask};

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index e24f514273591a7..66461b26468f797 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -6582,7 +6582,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_VP_STRIDED_STORE(SDNode *N,
 }
 
 SDValue DAGTypeLegalizer::WidenVecOp_MSTORE(SDNode *N, unsigned OpNo) {
-  assert((OpNo == 1 || OpNo == 3) &&
+  assert((OpNo == 1 || OpNo == 4) &&
          "Can widen only data or mask operand of mstore");
   MaskedStoreSDNode *MST = cast<MaskedStoreSDNode>(N);
   SDValue Mask = MST->getMask();