[llvm] 621183c - [X86] Add test case showing failure to remove unnecessary zext from address math

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 29 02:41:05 PST 2023


Author: Simon Pilgrim
Date: 2023-11-29T10:38:11Z
New Revision: 621183cb45b93517169787bb254705ab3baff2a2

URL: https://github.com/llvm/llvm-project/commit/621183cb45b93517169787bb254705ab3baff2a2
DIFF: https://github.com/llvm/llvm-project/commit/621183cb45b93517169787bb254705ab3baff2a2.diff

LOG: [X86] Add test case showing failure to remove unnecessary zext from address math

Thanks to @yubingex007-a11y for the original test case

Added: 
    llvm/test/CodeGen/X86/addr-mode-matcher-4.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/addr-mode-matcher-4.ll b/llvm/test/CodeGen/X86/addr-mode-matcher-4.ll
new file mode 100644
index 000000000000000..409596e484c43d3
--- /dev/null
+++ b/llvm/test/CodeGen/X86/addr-mode-matcher-4.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+
+%structA = type { %classB, float, i16, i8, i32 }
+%classB = type { double, double, double }
+
+define double @zext_shl_mul(ptr %a0, ptr %a1) {
+; X86-LABEL: zext_shl_mul:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movzwl (%ecx), %ecx
+; X86-NEXT:    leal (%ecx,%ecx,8), %ecx
+; X86-NEXT:    fldl 16(%eax,%ecx,4)
+; X86-NEXT:    retl
+;
+; X64-LABEL: zext_shl_mul:
+; X64:       # %bb.0:
+; X64-NEXT:    movzwl (%rsi), %eax
+; X64-NEXT:    leaq (%rax,%rax,4), %rax
+; X64-NEXT:    movl %eax, %eax
+; X64-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
+; X64-NEXT:    retq
+  %ld = load i16, ptr %a1, align 2
+  %zext = zext i16 %ld to i64
+  %gep = getelementptr inbounds %structA, ptr %a0, i64 %zext, i32 0, i32 2
+  %res = load double, ptr %gep, align 8
+  ret double %res
+}


        


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