[llvm] [SelectionDAG] Add space-optimized forms of OPC_EmitRegister (PR #73291)

[Matt Arsenault via llvm-commits]

================
@@ -3465,9 +3465,21 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
                                                         VT), nullptr));
       continue;
     }
-    case OPC_EmitRegister: {
-      MVT::SimpleValueType VT =
-        (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+    case OPC_EmitRegister:
+    case OPC_EmitRegisterI32:
+    case OPC_EmitRegisterI64: {
+      MVT::SimpleValueType VT;
+      switch (Opcode) {
+      case OPC_EmitRegisterI32:
+        VT = MVT::i32;
+        break;
+      case OPC_EmitRegisterI64:
----------------
arsenm wrote:

Can you generalize this to the enum value < 255?

https://github.com/llvm/llvm-project/pull/73291