[llvm] [TargetLowering][RISCV] Introduce shouldFoldSelectWithSingleBitTest and RISC-V implement. (PR #72978)

[Philip Reames via llvm-commits]

preames wrote:

Another case where we might want to inhibit this transform would be when we have both Zbs and Zicond.  In that case, we can produce the condition for the conditional move with a bit extract.  

More generally, when we have a bit extract instruction, the shift trick to produce the all ones mask is a bit questionable as a canonical form.  Haven't fully explored that, but might be worth some thought.  

https://github.com/llvm/llvm-project/pull/72978