[llvm] [SelectionDAG] Add space-optimized forms of OPC_EmitCopyToReg (PR #73293)

via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 23 23:40:14 PST 2023


github-actions[bot] wrote:

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git-clang-format --diff 579e721ce91bd47a7e519a85f99498eb45d3d693 31bfa75a0603d416cb358f6a1bd7a7f493927055 -- llvm/include/llvm/CodeGen/SelectionDAGISel.h llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
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View the diff from clang-format here.
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diff --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
index e62119c1f6..7e583663ce 100644
--- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -735,8 +735,8 @@ EmitMatcher(const Matcher *N, const unsigned Indent, unsigned CurrentIdx,
     unsigned Slot = C2RMatcher->getSrcSlot();
     if (Reg->EnumValue > 255) {
       assert(isUInt<16>(Reg->EnumValue) && "not handled");
-      OS << "OPC_EmitCopyToRegHalf, " << Slot << ", " << "TARGET_VAL("
-         << getQualifiedName(Reg->TheDef) << "),\n";
+      OS << "OPC_EmitCopyToRegHalf, " << Slot << ", "
+         << "TARGET_VAL(" << getQualifiedName(Reg->TheDef) << "),\n";
       ++Bytes;
     } else {
       if (Slot < 8) {

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https://github.com/llvm/llvm-project/pull/73293


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