[llvm] [RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (PR #71501)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 15 09:16:54 PST 2023


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@@ -1921,24 +1921,28 @@ define void @mscatter_v8i32(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
 ; RV64ZVE32F-NEXT:  .LBB28_13: # %cond.store7
 ; RV64ZVE32F-NEXT:    vsetivli zero, 1, e32, m2, ta, ma
 ; RV64ZVE32F-NEXT:    vslidedown.vi v10, v8, 4
+; RV64ZVE32F-NEXT:    vsetivli zero, 1, e32, m1, ta, ma
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preames wrote:

I don't think this regression is particularly concerning.  Given there can be costs associated with a higher LMUL on an operation, it's not even clear to me that having the extra vsetvli here is actually a regression in practice.  I don't think this is worth trying to change at this time.  

https://github.com/llvm/llvm-project/pull/71501


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