[llvm] [RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (PR #71501)
Wang Pengcheng via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 14 18:54:24 PST 2023
================
@@ -1921,24 +1921,28 @@ define void @mscatter_v8i32(<8 x i32> %val, <8 x ptr> %ptrs, <8 x i1> %m) {
; RV64ZVE32F-NEXT: .LBB28_13: # %cond.store7
; RV64ZVE32F-NEXT: vsetivli zero, 1, e32, m2, ta, ma
; RV64ZVE32F-NEXT: vslidedown.vi v10, v8, 4
+; RV64ZVE32F-NEXT: vsetivli zero, 1, e32, m1, ta, ma
----------------
wangpc-pp wrote:
Is this a regression here?
https://github.com/llvm/llvm-project/pull/71501
More information about the llvm-commits
mailing list