[llvm] [X86][MC] Support encoding of EGPR for APX (PR #71909)

[Shengchen Kan via llvm-commits]

================
@@ -952,9 +1031,9 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     llvm_unreachable("Unexpected form in emitVEXOpcodePrefix!");
   case X86II::MRMDestMem4VOp3CC: {
     //  src1(ModR/M), MemAddr, src2(VEX_4V)
-    Prefix.setR(MI, CurOp++);
-    Prefix.setB(MI, MemOperand + X86::AddrBaseReg);
-    Prefix.setX(MI, MemOperand + X86::AddrIndexReg);
+    Prefix.setRR2(MI, CurOp++);
----------------
KanRobert wrote:

All the four registers are GPRs. So we may use R2 here. In fact, the line 1058 will be changed to 
```
Prefix.set4VV2(MI, CurOp++);
```
after I promotes CMPZXADD to EVEX in the following patches.






























https://github.com/llvm/llvm-project/pull/71909