[llvm] [X86][MC] Support encoding of EGPR for APX (PR #71909)

[Shengchen Kan via llvm-commits]

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@@ -869,6 +934,20 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
 
   assert(!(TSFlags & X86II::LOCK) && "Can't have LOCK VEX.");
 
+#ifndef NDEBUG
+  unsigned NumOps = MI.getNumOperands();
+  for (unsigned I = NumOps ? X86II::getOperandBias(Desc) : 0; I != NumOps;
+       ++I) {
+    const MCOperand &MO = MI.getOperand(I);
+    if (!MO.isReg())
+      continue;
+    unsigned Reg = MO.getReg();
+    if (Reg == X86::AH || Reg == X86::BH || Reg == X86::CH || Reg == X86::DH)
+      report_fatal_error(
+          "Cannot encode high byte register in VEX/EVEX-prefixed instruction");
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KanRobert wrote:

VEX is not affected and VEX can not encode high byte register either. `VEX/EVEX` is used in the comment b/c the function name is `emitVEXOpcodePrefix`

https://github.com/llvm/llvm-project/pull/71909