[llvm] [RISCV][GISel] Instruction selection for G_JUMP_TABLE and G_BRJT. (PR #71987)

[via llvm-commits]

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@@ -405,6 +410,49 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
     MI.eraseFromParent();
     return constrainSelectedInstRegOperands(*Bcc, TII, TRI, RBI);
   }
+  case TargetOpcode::G_BRJT: {
+    unsigned EntrySize =
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tschuett wrote:

If I read your comments correctly, you have different options for the code sequence depending on which extensions are available. X86 has the same loads of 256-bit are legal, but depending on pure AVX or with VLX they haven selection strategies.

https://github.com/llvm/llvm-project/pull/71987