[llvm] [AMDGPU] Prefer lower total register usage in regions with spilling (PR #71882)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 9 18:35:03 PST 2023


================
@@ -130,6 +146,8 @@ bool GCNRegPressure::less(const GCNSubtarget &ST,
         return VW < OtherVW;
     }
   }
+
+  // Give final prefernce to less general RP
----------------
arsenm wrote:

Typo prefernce

https://github.com/llvm/llvm-project/pull/71882


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