[llvm] [RISCV][GISel] Add really basic support for FP regbank selection for G_LOAD/G_STORE. (PR #70896)

[Craig Topper via llvm-commits]

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@@ -869,6 +869,7 @@ AArch64RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     // Check if that store is fed by fp instructions.
     if (OpRegBankIdx[0] == PMI_FirstGPR) {
       Register VReg = MI.getOperand(0).getReg();
+      assert(VReg);
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topperc wrote:

Oops I didn't mean to leave that in. I was trying to understand why AArch64 considered the possibility of the operand not being a register. But that assert doesn't fail in any lit test.

https://github.com/llvm/llvm-project/pull/70896