[llvm] LegalizeVectorTypes: fix bug in widening of vec result in xrint (PR #71198)

[Simon Pilgrim via llvm-commits]

================
@@ -349,81 +335,40 @@ define <8 x i64> @lrint_v8f64(<8 x double> %x) {
 ; X86-SSE2-NEXT:    movl %esp, %ebp
 ; X86-SSE2-NEXT:    .cfi_def_cfa_register %ebp
 ; X86-SSE2-NEXT:    andl $-16, %esp
-; X86-SSE2-NEXT:    subl $80, %esp
-; X86-SSE2-NEXT:    movaps 8(%ebp), %xmm3
-; X86-SSE2-NEXT:    movhps %xmm0, {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    movlps %xmm0, {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    movhps %xmm1, {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    movlps %xmm1, {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    movhps %xmm2, {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    movlps %xmm2, {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    movhps %xmm3, {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    movlps %xmm3, {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fldl {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fistpll {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fldl {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fistpll {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fldl {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fistpll {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fldl {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fistpll {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fldl {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fistpll {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fldl {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fistpll {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fldl {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fistpll {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fldl {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    fistpll {{[0-9]+}}(%esp)
-; X86-SSE2-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-SSE2-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
-; X86-SSE2-NEXT:    movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; X86-SSE2-NEXT:    movsd {{.*#+}} xmm2 = mem[0],zero
-; X86-SSE2-NEXT:    movsd {{.*#+}} xmm1 = mem[0],zero
-; X86-SSE2-NEXT:    movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]
-; X86-SSE2-NEXT:    movsd {{.*#+}} xmm3 = mem[0],zero
-; X86-SSE2-NEXT:    movsd {{.*#+}} xmm2 = mem[0],zero
-; X86-SSE2-NEXT:    movlhps {{.*#+}} xmm2 = xmm2[0],xmm3[0]
-; X86-SSE2-NEXT:    movsd {{.*#+}} xmm4 = mem[0],zero
-; X86-SSE2-NEXT:    movsd {{.*#+}} xmm3 = mem[0],zero
-; X86-SSE2-NEXT:    movlhps {{.*#+}} xmm3 = xmm3[0],xmm4[0]
+; X86-SSE2-NEXT:    subl $16, %esp
+; X86-SSE2-NEXT:    movapd %xmm0, %xmm3
+; X86-SSE2-NEXT:    movapd 8(%ebp), %xmm4
+; X86-SSE2-NEXT:    cvtsd2si %xmm1, %eax
+; X86-SSE2-NEXT:    movd %eax, %xmm5
+; X86-SSE2-NEXT:    unpckhpd {{.*#+}} xmm1 = xmm1[1,1]
+; X86-SSE2-NEXT:    cvtsd2si %xmm1, %eax
+; X86-SSE2-NEXT:    movd %eax, %xmm0
+; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm5 = xmm5[0],xmm0[0],xmm5[1],xmm0[1]
+; X86-SSE2-NEXT:    cvtsd2si %xmm3, %eax
+; X86-SSE2-NEXT:    movd %eax, %xmm0
+; X86-SSE2-NEXT:    unpckhpd {{.*#+}} xmm3 = xmm3[1,1]
+; X86-SSE2-NEXT:    cvtsd2si %xmm3, %eax
+; X86-SSE2-NEXT:    movd %eax, %xmm1
+; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; X86-SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm5[0]
+; X86-SSE2-NEXT:    cvtsd2si %xmm4, %eax
+; X86-SSE2-NEXT:    movd %eax, %xmm3
+; X86-SSE2-NEXT:    unpckhpd {{.*#+}} xmm4 = xmm4[1,1]
+; X86-SSE2-NEXT:    cvtsd2si %xmm4, %eax
+; X86-SSE2-NEXT:    movd %eax, %xmm1
+; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
+; X86-SSE2-NEXT:    cvtsd2si %xmm2, %eax
+; X86-SSE2-NEXT:    movd %eax, %xmm1
+; X86-SSE2-NEXT:    unpckhpd {{.*#+}} xmm2 = xmm2[1,1]
+; X86-SSE2-NEXT:    cvtsd2si %xmm2, %eax
+; X86-SSE2-NEXT:    movd %eax, %xmm2
+; X86-SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
+; X86-SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
 ; X86-SSE2-NEXT:    movl %ebp, %esp
 ; X86-SSE2-NEXT:    popl %ebp
 ; X86-SSE2-NEXT:    .cfi_def_cfa %esp, 4
 ; X86-SSE2-NEXT:    retl
-;
-; X64-SSE-LABEL: lrint_v8f64:
-; X64-SSE:       # %bb.0:
-; X64-SSE-NEXT:    cvtsd2si %xmm0, %rax
-; X64-SSE-NEXT:    movq %rax, %xmm4
-; X64-SSE-NEXT:    unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
-; X64-SSE-NEXT:    cvtsd2si %xmm0, %rax
-; X64-SSE-NEXT:    movq %rax, %xmm0
-; X64-SSE-NEXT:    punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm0[0]
-; X64-SSE-NEXT:    cvtsd2si %xmm1, %rax
-; X64-SSE-NEXT:    movq %rax, %xmm5
-; X64-SSE-NEXT:    unpckhpd {{.*#+}} xmm1 = xmm1[1,1]
-; X64-SSE-NEXT:    cvtsd2si %xmm1, %rax
-; X64-SSE-NEXT:    movq %rax, %xmm0
-; X64-SSE-NEXT:    punpcklqdq {{.*#+}} xmm5 = xmm5[0],xmm0[0]
-; X64-SSE-NEXT:    cvtsd2si %xmm2, %rax
-; X64-SSE-NEXT:    movq %rax, %xmm6
-; X64-SSE-NEXT:    unpckhpd {{.*#+}} xmm2 = xmm2[1,1]
-; X64-SSE-NEXT:    cvtsd2si %xmm2, %rax
-; X64-SSE-NEXT:    movq %rax, %xmm0
-; X64-SSE-NEXT:    punpcklqdq {{.*#+}} xmm6 = xmm6[0],xmm0[0]
-; X64-SSE-NEXT:    cvtsd2si %xmm3, %rax
-; X64-SSE-NEXT:    movq %rax, %xmm7
-; X64-SSE-NEXT:    unpckhpd {{.*#+}} xmm3 = xmm3[1,1]
-; X64-SSE-NEXT:    cvtsd2si %xmm3, %rax
-; X64-SSE-NEXT:    movq %rax, %xmm0
-; X64-SSE-NEXT:    punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm0[0]
-; X64-SSE-NEXT:    movdqa %xmm4, %xmm0
-; X64-SSE-NEXT:    movdqa %xmm5, %xmm1
-; X64-SSE-NEXT:    movdqa %xmm6, %xmm2
-; X64-SSE-NEXT:    movdqa %xmm7, %xmm3
-; X64-SSE-NEXT:    retq
-  %a = call <8 x i64> @llvm.lrint.v8i64.v8f64(<8 x double> %x)
-  ret <8 x i64> %a
+  %a = call <8 x iXLen> @llvm.lrint.v8iXLen.v8f64(<8 x double> %x)
----------------
RKSimon wrote:

Where are the X64-AVX-* checks ?

https://github.com/llvm/llvm-project/pull/71198