[llvm] [AMDGPU] Move WWM register pre-allocation to during regalloc (PR #70618)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 3 05:36:00 PDT 2023


jayfoad wrote:

Change looks good overall but I don't quite understand this:

> I realized that we need to explicitly ignore SI_SPILL_S32_TO_VGPR instructions which occur in STRICT_WWM sections otherwise they will unintentionally be assigned WWM registers. This brings the total test diff on this down massive to primarily wwm-reserved-spill.ll, which shows a change in use of registers because SGPR spill now get first access to VGPRs before WWM pre-allocation runs.

Do SI_SPILL_S32_TO_VGPR instructions refer to _physical_ VGPRs? If so, why do you need to explicitly ignore them in this pass?

If SI_SPILL_S32_TO_VGPR instructions refer to virtual VGPRs then I don't understand how they "get first access to [physical?] VGPRs".

https://github.com/llvm/llvm-project/pull/70618


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